The present invention relates to an image memory apparatus in which an address is assigned and image information is inputted into and outputted from the apparatus, and specifically, to a technology for promoting concurrent processing of writing and reading operations so that high speed processing can be carried out.
Recently, the capacity of memory devices has been greatly increased, and one-chip memory devices having small dimensions and large memory capacity have been developed. When such a memory device is installed into a computer operated apparatus, dimensions of the apparatus can be reduced.
For example, FIG. 8 shows a block diagram of a digital copier in which the above-described memory device is installed. When a copying operation for a plurality of sheets is carried out, the following operations are carried out as described below.
Initially, when a CCD 30 photoelectrically converts an optical image on an original document, and outputs an analog image signal, an analog signal processing circuit 31 amplifies the analog image signal, carries out signal processing such as offset adjustment, and the like, and then, outputs the signal-processed image signal to an A/D conversion circuit 32. Then, the analog image signal is digitalized by the A/D conversion circuit 32, and when a multi-valued image signal is obtained, the image signal processing circuit 33 carries out signal processing such as shading correction. The multivalued image signal is stored in an image memory 34, and also is recorded by a laser beam printer 36 through a laser writing circuit 35.
In the case where multi-copying is carried out, the image is continuously recorded when the multivalued image signal stored in the image memory 34 is read out.
Alternatively, sometimes, a personal computer 37 is used instead of the image memory 34, as shown in FIG. 9, and the image manufactured by the personal computer is recorded in the same way as shown in FIG. 8.
In this connection, when the memory capacity of a one-chip memory is increased, although the dimensions of computer operated apparatus can be made smaller, new problems occur in some instances.
That is, because the address area allocated to the one-chip memory is increased, data of the different address in the address area allocated to the chip can not be written or read concurrently, when data of the objective addresses is written or read.
That is, regarding the above-described example of the digital copier, in the copy of a plurality of volumes of original documents, consisting of a plurality of sheets, in the case where, for example, the one-chip memory has a memory capacity sufficient for a plurality of sheets, if the recording operation is carried out, having priority to the reading operation, the second sheet reading operation can not be carried out until recording of a plurality of volumes of the first sheet have been completed. Reversely, when the reading operation is carried out prior to the recording operation, the recording operation can not be carried out until the reading operation of a plurality of sheets has been completed. Accordingly, although the copier has independent reading functions and recording functions, both functions can not be used efficiently, which is a problem.
The reason for the preceding statements is that the entire memory area is fixed to the writing mode or the reading mode in the structure of the memory as shown in a block diagram of the memory in FIG. 10 when the writing operation or the reading operation is carried out to the memory. In the above example, when a plurality of volumes of the first sheet are being read, the memory is in the reading mode. Therefore, a second sheet can not be written in the memory. Further, when a plurality of sheets of the original document have been read, and these are being written into the memory, the memory is fixed to the writing mode. Therefore, the first sheet can not be read out and recorded. The reason for the above is that the other mode can not be set concurrently with respect to another address area.